set_property PACKAGE_PIN BB31 [get_ports mcu_wakeup]
set_property PACKAGE_PIN AV40 [get_ports mcu_rst]
set_property IOSTANDARD LVCMOS18 [get_ports mcu_wakeup]
set_property IOSTANDARD LVCMOS18 [get_ports mcu_rst]
set_property IOSTANDARD LVDS [get_ports CLK200MHZ_p]
set_property PACKAGE_PIN E19 [get_ports CLK200MHZ_p]
set_property PACKAGE_PIN AU36 [get_ports {gpioA[17]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gpioA[31]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gpioA[30]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gpioA[29]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gpioA[28]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gpioA[27]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gpioA[26]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gpioA[25]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gpioA[24]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gpioA[23]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gpioA[22]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gpioA[21]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gpioA[20]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gpioA[19]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gpioA[18]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gpioA[17]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gpioA[16]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gpioA[15]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gpioA[14]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gpioA[13]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gpioA[12]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gpioA[11]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gpioA[10]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gpioA[9]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gpioA[8]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gpioA[7]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gpioA[6]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gpioA[5]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gpioA[4]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gpioA[3]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gpioA[2]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gpioA[1]}]
set_property IOSTANDARD LVCMOS18 [get_ports {gpioA[0]}]
set_property PACKAGE_PIN AU33 [get_ports {gpioA[16]}]
set_property PACKAGE_PIN AY30 [get_ports {gpioA[31]}]
set_property PACKAGE_PIN AW30 [get_ports {gpioA[30]}]
set_property PACKAGE_PIN AV30 [get_ports {gpioA[26]}]
set_property PACKAGE_PIN AY33 [get_ports {gpioA[27]}]
set_property PACKAGE_PIN BA31 [get_ports {gpioA[28]}]
set_property PACKAGE_PIN BA32 [get_ports {gpioA[29]}]
set_property PACKAGE_PIN AP41 [get_ports {gpioA[25]}]
set_property PACKAGE_PIN AR35 [get_ports {gpioA[24]}]
set_property PACKAGE_PIN AT37 [get_ports {gpioA[23]}]
set_property PACKAGE_PIN AR37 [get_ports {gpioA[22]}]
set_property PACKAGE_PIN AN39 [get_ports {gpioA[21]}]
set_property PACKAGE_PIN AM39 [get_ports {gpioA[20]}]
set_property PACKAGE_PIN AP31 [get_ports {gpioA[19]}]
set_property PACKAGE_PIN AN31 [get_ports {gpioA[18]}]
set_property PACKAGE_PIN AP42 [get_ports pmu_paden]
set_property PACKAGE_PIN AU39 [get_ports pmu_padrst]
set_property IOSTANDARD LVCMOS18 [get_ports pmu_paden]
set_property IOSTANDARD LVCMOS18 [get_ports pmu_padrst]
set_property PACKAGE_PIN AR40 [get_ports {gpioA[7]}]
set_property PACKAGE_PIN AW40 [get_ports {gpioA[6]}]
# DO NOT USE gpioa[5]
set_property PACKAGE_PIN AJ28 [get_ports {gpioA[5]}]
set_property PACKAGE_PIN AP40 [get_ports {gpioA[4]}]
set_property PACKAGE_PIN AU38 [get_ports {gpioA[3]}]
set_property PACKAGE_PIN AT31 [get_ports {gpioA[2]}]
set_property PACKAGE_PIN AW31 [get_ports {gpioA[1]}]
set_property PACKAGE_PIN AR33 [get_ports {gpioA[0]}]
set_property PACKAGE_PIN AN40 [get_ports {gpioA[15]}]
set_property PACKAGE_PIN AR39 [get_ports {gpioA[14]}]
set_property PACKAGE_PIN AR38 [get_ports {gpioA[13]}]
set_property PACKAGE_PIN AT42 [get_ports {gpioA[12]}]
set_property PACKAGE_PIN AR42 [get_ports {gpioA[11]}]
set_property PACKAGE_PIN AN41 [get_ports {gpioA[10]}]
set_property PACKAGE_PIN AT40 [get_ports {gpioA[9]}]
set_property PACKAGE_PIN BA30 [get_ports {gpioA[8]}]


create_clock -period 5.000 -name sys_clk_n [get_ports CLK200MHZ_n]

create_clock -period 8.000 -name eth_rxc_n [get_ports ref_clk_n]

set_property PACKAGE_PIN AV39 [get_ports touch_key]

set_property LOC AH8 [get_ports ref_clk_p]
set_property LOC AH7 [get_ports ref_clk_n]
set_property PACKAGE_PIN AJ33 [get_ports eth_rst_n]
set_property LOC AM7 [get_ports eth_rx_n]
set_property LOC AM8 [get_ports eth_rx_p]
set_property LOC AN1 [get_ports eth_tx_n]
set_property LOC AN2 [get_ports eth_tx_p]

set_property IOSTANDARD LVCMOS18 [get_ports eth_rst_n]

set_property IOSTANDARD LVCMOS18 [get_ports touch_key]

set_property LOC GTXE2_CHANNEL_X1Y1 [get_cells u_adc_sim/*/*/*/transceiver_inst/gtwizard_inst/*/gtwizard_i/gt0_GTWIZARD_i/gtxe2_i]


set_property -dict {PACKAGE_PIN AH31 IOSTANDARD LVCMOS18} [get_ports eth_mdc]
set_property -dict {PACKAGE_PIN AK33 IOSTANDARD LVCMOS18} [get_ports eth_mdio]



set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets IOBUF_jtag_TCK/O]

set_false_path -from [get_clocks -of_objects [get_pins ip_mmcm/inst/mmcm_adv_inst/CLKOUT0]] -to [get_clocks -of_objects [get_pins ip_mmcm/inst/mmcm_adv_inst/CLKOUT1]]

create_clock -period 1.000 -name virtual_clock
set_false_path -from [get_clocks eth_rxc_n] -to [get_clocks clkout0]
set_property C_CLK_INPUT_FREQ_HZ 300000000 [get_debug_cores dbg_hub]
set_property C_ENABLE_CLK_DIVIDER false [get_debug_cores dbg_hub]
set_property C_USER_SCAN_CHAIN 1 [get_debug_cores dbg_hub]
connect_debug_port dbg_hub/clk [get_nets gmii_rx_clk]